Reducing the power usage of computers and various computer components has become a high priority in most system designs (minimizing the total cost of ownership). From a controller/expander perspective, much of the focus has been on adding features to the SAS/SATA specifications that allows the host controller, expander or data storage device to initiate a transition to either a Partial or Slumber power mode. Each power mode allows a different level of power savings to be achieved. This works well when the connected device only uses a single link since the link power mode will only change when a particular setting allows. When the topology includes a wide port (a wide port is typically made up of links grouped in multiples of 4) the power management gets more complicated. A wide port increases the bandwidth by sending and receiving I/Os on any of the available links, thereby limiting I/O delays. This flexibility can increase power savings in situations where the consumed bandwidth doesn't require all of the available links so one or more links may enter a reduced power state.
When an I/O is sent from a controller to an expander on one Link but the response is received on a different Link, the second Link may be brought out of a reduced power mode (example: an expander may use a round robin algorithm when determining which link of a wide port to send I/O responses).
Consequently, it would be advantageous if an apparatus existed that is suitable for negotiating between devices to allow specific Links to enter a persistent reduced power state.